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OS & multicore / 20 MIN

Investigate an unexpected reset

Preserve the first evidence before a reset clears the state that could explain it.

01

Reset reason first

Read the MCU's reset-cause registers as early as the platform requires. Distinguish power, external, software and watchdog-related causes using the device documentation. A watchdog reset tells you the supervision outcome, not automatically the underlying software defect.

02

Supervision has a contract

Watchdog supervision may check alive counts, deadlines and logical checkpoint order. A task can execute but report checkpoints incorrectly. Conversely, an alive report can occur while useful application work is wrong. Inspect the configured supervision mode and expected checkpoints.

03

Retain bounded evidence

Store only well-defined diagnostic context in an appropriate retained region or approved persistent mechanism. Include validity and versioning, and consider power-loss behaviour. Correlate OS errors, traps, stack information and task timing to find the cause.

SEE THE SYSTEM

Follow each transition

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STEP 1

Fault occurs

A timing, execution or hardware issue develops.

Conceptual sequence. Timing is slowed for learning; it is not a hardware measurement.

PUT IT TO WORK

Your investigation

The watchdog reset bit is set. What evidence would distinguish a stalled task from incorrect checkpoint configuration?

Reveal the investigation checklist
  1. Preserve reset and trap status.
  2. Trace the supervised task and checkpoints.
  3. Compare the active supervision mode with configuration.
  4. Reproduce with the same load and record the first deviation.
CHECK YOUR UNDERSTANDING

A watchdog reset uniquely identifies the original defect. True?

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